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- From: "Jyrki Saarinen" <jsaarinen@kone.fipnet.fi>
- Date: Tue, 9 Jan 96 20:15:09 UT
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- X-Original-Date: Tue, 09 Jan 96 21:30:36
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- Subject: Re: New C2P
- Message-ID: <38231962@kone.fipnet.fi>
-
-
- > Actually my c2p are processor-only converters because I dont understand
- > enough about blitter-coding. Besides I am mainly interested in
- > 8bpl-converters for my 3d-routines. The original c2p-routines are from
-
- You dont have to understand the blittings, just use them.. ;)
-
- > aminet (I think fastc2p.lha )
-
- That package has a real 68040 routine and CPU-only routine
- that is for 68020/030.
-
- > ( I use a comparebuffer which check if a block of 8 pixels have changed.
- > If yes then the comparebuffer is updated and the converter starts.
- >áIf not I simply step to the next block)
-
- In realtime 3d gfx comparebuffer is not a very good idea, since
- the changes have to be checked at every 32 pixels because
- chip writes must be longwords. (32 pixels)
-
- > >What routine this is? I guess 030/50 should be able
- > >o get c2p free -->á320x256x8 screen should be about 20ms.
- > >This could be perhaps achieved by doing three passes
- > >with CPU and the last one with the blitter.
- >
- > Sounds good could you post or mail some asm-source ? I would prefer a
- > cpu-only-solution.
-
- There is no such a routine yet. I was just speculating.
- CPU-only solution is good only starting from the 68040,
- 68020 and 68030 benefit blitting very much because
- they are not fast enough to do all the c2p passes
- between chip writes. Therefore blitter is used
- to do remaining passes. The amount of passes
- done with the blitter and the CPU depends on the
- CPU speed; optimal amount is that the CPU phase
- of the chunky2planar process takes as much time
- as a straight move.l (a0)+,(a1)+ copying from
- fast ram to chip ram.
-
- > Also someone wrote that you could do 12 or 13 instructions during chip
- > write. Is there somewhere (in aminet) a time-table on this ?
-
- It depends on the CPU ofcourse. On my 040/40 I can have a free
- muls d0,d1 or two after a chip write.
-
- > I found a c2p-converter which use selfmodifying code. This one copy
- > himself to a quadword-align memory-position. Does this give any advantages ?
- >á(I think a 8bpl c2p is small enough to fit into the cache)
-
- It is because of the instrction burst in the 68030 and upwards.
- They benefit of having the loop startpoint 16 bytes aligned.
-
- -- _
- a Stellar programmer _ //
- "Amiga - back for the future" \X/
-